Hi Erich,
Sorry for the delay. Thanks for your clarification that you have observe similar issue in simulation. For your information, the simulation would represent the actual functional behavior of the IP. If issue is observed in simulation, you would be seeing similar in the hardware.
As I understand it, all the IPs will undergo functional verification by the Engineering prior to release. If bug was found during the verification, it will be fixed prior to release. For those which was not fixed in current release, it will be stated in the errata.
To facilitate further debugging into the functional behavior, would you mind to share with me the previous simulation that you had which show the issue? I would like to perform observation replication on my side for further debugging. Please help to share with me your simulation together with steps for replication. Once replicated, I will engage Factory if required.
It would be much appreciated if you can share me your simulation for replication so that we could further debug into this potential problem. Thanks for your understanding.
Please let me know if there is any concern. Thank you.
Best regards,
Chee Pin
Occasional Contributor
