Forum Discussion

amildm's avatar
amildm
Icon for Contributor rankContributor
2 years ago

Avalon ST Multiplexer -> is it possible to concatenate?

Hi, As for the Avalon ST Multiplexer (Embedded Peripheral) -> is it possible to concatenate such several multiplexers? The Avalon ST Multiplexer iself has 16 input interfaces, but I need to multi...
Pcie
amildm's avatar
amildm
Icon for Contributor rankContributor
2 years ago

The Avalon-ST Multiplexer doesn't have the Packet User Signal, only Start of Packet and End Of Packet.

Again, as for the picture below,

how will the inputs in0 through in19 be scheduled on the OUT output?

The in0 .. in19 are packet based 16bits width inputs (with start-of-frame and end-of-frame signals).

How should I configure the MUX0 and MUX1 so that on the OUT port will be observed packets in0, in1, ... in19 in this certain order (in0, in1, ..., in19)?

Thanks!

Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi,


Thanks sstrell for helping to answer on behave.

I wish to follow up with you about this case.

Do you have any further questions on this matter ?

​​​​​​​Else I would like to have your permission to close this forum ticket

Regards,

Wincent_Intel

p/s: If any answer from the community or Intel Support is helpful, please feel free to give the best answer or rate 9/10 survey.

  • amildm's avatar
    amildm
    Icon for Contributor rankContributor
    2 years ago

    The proposed solution is under test, will update the thread with the results