avalon_spi RX data and onboard memory

IOWR_8DIRECT() and alt_uncached_malloc() are ways to make sure your NIOS cache doesn't get in the way of accessing either the peripheral or the memory you hope to come in and access independently from System Console.

They aren't necessarily "fast" but they are direct.

"Fast" would be executing your loop 100 times and then flushing the data cache when you were done, so that the System Console could pick up the results. Note that all of this is assuming you're using a NIOS with a cache enabled.

There are lots of different ways of accomplishing the same task.

One thing I would recommend is simply adding a second "mailbox" On-Chip RAM memory that is dedicated to holding your sample data and possibly has a software semaphore to share with the System Console. i.e. system console TCL will command the NIOS to execute, the NIOS fills the sample buffer and indicates completion back to the system console. If you add a second memory, you would just use it's# define base address from "system.h" directly, and you would not use any malloc for it. This has the benefit that the buffer pointers remain fixed so system console TCL side always knows where to go.

Your NIOS side could look approximately like this:

# define MY_COMMAND_WORD (FOO_RAM_BASE + 0x00)
# define MY_SAMPLE_BUFFER  (FOO_RAM_BASE + 0x20)
while( IORD_32DIRECT(MY_COMMAND_WORD) != go_magic_value ) { /* waiting... */ };
unsigned short *ptr = MY_SAMPLE_BUFFER;
for(i=0; i < 100; i++) { *ptr++ = go_do_spi_read_of_two_bytes(); }
alt_dcache_flush();
IOWR_32DIRECT(MY_COMMAND_WORD, nios_is_done_magic_value);