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- yoichiK_altera
Contributor
Hi
Can you give a more information on this ?
I assume that DDR4 interface is 72 bit and Avalon mm interface is 72x8 = 576bit interface.
You tried to write with 20 burst length and following that you tried to read the same address from read.
you can check the avalon burst length protocol with the avalon interface spec.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_avalon_spec.pdf