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Altera_Forum's avatar
Altera_Forum
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17 years ago

Avalon-MM master interface on Frame Buffer

I have a video system using a single SDRAM controller and two frame buffers. I've configured the controller with parameters from the memory data sheet and am unsure how to correctly configure the Av...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

Hi,

With 8-bit RGB in parallel and a port width of 32, the frame buffer will store one pixel (24 bits) per word and 25% and the bandwidth is wasted. If you increase the port width to 256 it goes to 10 pixels per word and "only" 6.25% of the bandwidth is wasted. This is probably enough to explain what you are seeing.

In many cases the position of the frame buffer does not really matter but there are exceptions which usually involve the clipper, the scaler, the color plane sequencer or the mixer. In your case, it probably does make sense to place the frame buffer directly after the CVI (8 bit 2 color plane in seq using 16-bit words) but we would need to see the full datapath to be sure of that.

vgs