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Altera_Forum's avatar
Altera_Forum
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16 years ago

Avalon MM Interface

Hi, I'm using a Nios2 processor as an avalon memory mapped master. The Nios2 is connected to a avalon mm slave, which is the controller for a sram. Now I can read and write from Nios2 to the s...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

thats why i use the signal name suggestion from one of those altera documents.

avm_userif1_read (thats an output)

avs_userif2_read (thats an input)

where avs is avalon valid slave

and avm is avalon valid master

the most positive effect is, that the sopc component editor automaticaly does the correct connection between your ip interface signal and the corresponding avalon signal. well 99% it works.