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Altera_Forum
Honored Contributor
16 years agoAvalon MM Interface
Hi, I'm using a Nios2 processor as an avalon memory mapped master. The Nios2 is connected to a avalon mm slave, which is the controller for a sram. Now I can read and write from Nios2 to the s...
Altera_Forum
Honored Contributor
16 years agoI got confused between masters and slave... Indeed in your case you must use addresses 0x0c000000 / 0x0c000004 etc...
If you put some Signaltap probes on the SRAM interface, do you see any access attempt?