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Altera_Forum
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16 years ago

Avalon MM Interface

Hi, I'm using a Nios2 processor as an avalon memory mapped master. The Nios2 is connected to a avalon mm slave, which is the controller for a sram. Now I can read and write from Nios2 to the s...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

The additional hardware is my own IP (not realised yet).

I think I need to create an avalon mm master. At the top level of SOPC I need a (unidirectional) adressbus (to the IP), a data bus (to the top-level).

and a clock (data valid with rising edge).

The goal is to give the data of the sram at the adressbus adress to the databus.

How can I reach this? Sorry, I don't have any experience with the component editor.

Thank you.

Mark