Forum Discussion
Altera_Forum
Honored Contributor
16 years agoYou may be able to use a Farrow filter, there is an application note here:http://www.altera.com/literature/an/an347.pdf?gsa_pos=1&wt.oss_r=1&wt.oss=an347
There is also a good article on Farrow filters here: http://www.signumconcepts.com/download/paper018.pdf Sorry, but I don't know of an Altera IP core for this function but if the Xilinx IP supplier is a 3rd party company they might be able to let you have the VHDL or Verilog which can probably easily be ported to an Altera.