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Altera_Forum
Honored Contributor
15 years agoAsynchronous/ controlling clock port of a flipflop
Hello All, I am wondering if i can explicitly define a clock port to a flip-flop(D-FF or T-FF). The functionality should be like this, I need to sample a date input with respect to a positive-risi...
Altera_Forum
Honored Contributor
15 years agoA flip-flop samples the data input always exactly at the positive (or negative) rising edge of it's clock input. It's no problem to use a control signal other than the system clock as clock for a FF, but then it's output is asynchronous in respect to the system clock and has to be synchronized.