Forum Discussion
Altera_Forum
Honored Contributor
16 years agoHi Kevin,
Those are good points. Checked the reset pin and impedance matching issues you mentioned and found them to be conforming. Our vendor also verified impedance characteristics of PCIe traces. The issue happens randomly. Sometimes after adding a node to the SignalTap-II and sometimes after adding a seemingly innocuous line of verilog code (like an assignment) to a state-machine of a custom Avalon module. I don't know if moving to Quartus 9.0 (we're on 8.0 sp1) would resolve the issue; but that is one option we are considering. regards, -swguy