Arria 10 transceiver ATX PLL unlocked, when reference clock not present during device configuration

Hi,

As I understand it from your PDF, you observe an issue where ATX PLL unable to achieve lock due to no refclk present at power up. You have tested recalibration but seems not helping. With stable refclk present at power up, there PLL is locked.

To facilitate further debugging, just to check with you on the following:

1. Just wonder if you have had a chance to run through simulation with your recalibration steps to see if the ATX PLL is able to re-achieve lock?

2. Can you try to hold the ATX PLL in reset during power up, release when stable refclk is present. Then perform recalibration to ATX PLL followed by a reset.

3. Just to double check if the CLKUSR is directly sourced from a free-running and stable clock source on board?

4. Please share with me further on the steps that you have taken for recalibration ie the register writing sequence. I would like to see if can spot any anomaly.

Please let me know if there is nay concern. Thank you.