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I am using the External Memory Interface IP core in Qsys to connect to a DDR3 daughter memory card through the Arria 10 GX FPGA Development Kit via the HiLo interface. I am also using an address span extender between the CPU and EMI the connects to the EMI's ctrl_amm_0 port; there is an error claming that the data width of this connection must be of power of two and between 8 and 4096. I'm not sure how to check the current data width or what I need to change to get the size to a power of two.
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Hi, certain EMIF IP presets include ECC thus the DQ width is not the power of two (for example, instead of x64 you will get x72). If you are using Nios II as the CPU, you can navigate to the "Advanced Features" and tick "ECC Present" (I am using Quartus 16.0, name could be different in other versions). Doing so will create a Avalon Streaming Source for ECC event (which you can connect to a AVST sink) - and at the same time allow the EMIF with ECC enabled to connect to Nios
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