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Sijith's avatar
Sijith
Icon for Occasional Contributor rankOccasional Contributor
3 years ago

API calls failed while running PCIe DMA transfer example design

Hi, I was working the PCIe DMA transfer example design for Arria 10. I have added a counter custom IP which counts upto 1000, and An Avalon FIFO IP with the design. My intention is to write the data...
Memory
Pcie
Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hi,


Sorry I am a little bit lost.

Previously when I talking with Sijith, he mention that follow the PCIe_ddr4 design. the DMA APi call to read data is fails.

Also found that API call failure.


Then we move to simulation and check if the same behavior happen or not.

If this is emif simulation, you may refer to https://www.youtube.com/watch?v=iCr-0eOwo9o&ab_channel=IntelFPGA

And see if you are able to seeing something similar as the hardware or not.


Last I would like to confirm back with you, is this is a PCIe design or EMIf design ?

the error is happen in emif part of PCIe HIP part ?


Regards,

Wincent_Intel



  • treble99's avatar
    treble99
    Icon for New Contributor rankNew Contributor
    3 years ago

    Hello Wincent,

    Then we move to simulation and check if the same behavior happen or not. And see if you are able to seeing something similar as the hardware or not.

    This is still what we want to do. But we dont have all the parts for it. I am going to review the video and get back to you.


    Last I would like to confirm back with you, is this is a PCIe design or EMIf design ?

    the error is happen in emif part of PCIe HIP part ?

    We are lost in this part to identify where this is happening. I have taken up Simulation efforts. This is Terasic's PCIe_DDR example. It has a PCIe Hard IP as well as DDR emif. Please see attached Image.

    Best,
    Manish