Anyone using Altera PCIe core with Avalon-MM in SOPC?

Yes. My design uses the slave port, like the application note 532 (http://www.altera.com/literature/an/an532.pdf (http://www.altera.com/literature/an/an532.pdf)). The read and write master ports of the DMA Controller are connected with Rx Slave port of PCIe Core. When the dma controller generate read or write request, this ones generates PCIE Mem read or write requests packets.

Take a look in Avalon-MM-to-PCI Express Address Translation Section in the Chapter 4 of PCI Express User Guide. It's very important to understand the Address Translation. It's important too verify your host software and driver. Because when you generate a write request in slave Rx Port, this request will be translated and will generate a PCIe Mem Write Packet. This packet will write the data in the address translated and may cause memory write in protected regions of the host memory (take a look at the driver jungo and the function of Dma Lock, which reserves a physical memory area for safe write or read by the pci express link).