Altera_Forum
Honored Contributor
16 years agoAMBA bus
Hi, Altera community
I am doing my graduation thesis on AMBA bus design. The specs requires me to design an AMBA bus system which can support 15 masters and 15 slaves. Initially, it is such a big challenge to me because i am new in FPGA design. In addition, students have few chances to access Development KIT from Altera for our university's budget. You know, i am learning in Vietnam, a developing country in Asia. The language is used in the project which will be Verilog. However, after referencing DE2's user manual, i don't know how i can test my design in real devices after it has already tested through software simulation. There are not enough peripherals for me to do my tests. Anyone has experience on designing AMBA bus in DE2, please give me your advices. Trung Mai Van