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Altera_Forum's avatar
Altera_Forum
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12 years ago

altserial_flash_loader shared access

I've been trying to get both the JTAG indirect flash programming and a user design utilizing the SPI interface to work. Both cores work independently. I am feeding dclk_in with a 20MHz output of an a...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

Nevermind! I've discovered the undocumented interface behind the altserial_flash_loader:

component stratixiv_asmiblock

port(

dclkin : in std_logic;

scein : in std_logic;

sdoin : in std_logic;

data0out : out std_logic;

oe : in std_logic);

end component;

I removed the bad clock multiplexing code in altserial_flash_loader and wrote my own. Now everything works perfectly.