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Altera_Forum
Honored Contributor
15 years agoThanks for the feedback. I just learnt that ddr3 controller with altmemphy has problems when derive_pll_clocks command is run in the some other sdc file in the design project. So if anyone else is having a problem where the filters in the ddr3 controller phy related sdc files are ignored because the nodes cannot be found, try to scan all other sdc files and remove the derive_pll_clocks command. It will cause problems in the other sdc files... I do not yet have an answer for how to address that.