Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHi,
the ddr3_example_top is only a help to understand, how to connect the DDR3 into your design. There is an ddr3_example_top testbench to simulate the ddr3 core with modelsim. The ddr3_example_top have two entities, one driver (to test the DDR3 core) and the DDR3 core itself. You can simulate these example_top or can compile it into your hardware. It should work. Then when you understand it, you can implement it to your design. Please, can you post your Error message? Regards, Josef