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Altera_Forum
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14 years ago

ALTLVDS_RX megafunction

Hi, guys: when i build a new project with HDL and megafunction , I use the ALTLVDS_RX for adc data(8 channels and deserialization factor is 1) and it works . Now, I want to generate a system i...
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Altera_Forum
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14 years ago

The clock-rate is 400MHz ,generating by a PLL.

I write the ADC data into a fixed depth FIFO , just several thourands of bytes.