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Wow what a strange complaint. I have designed processing cores and you can't get the performance without the pipeline.
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I didn't complain about the pipeline. All I said about the pipeline, is that its depth has a devastating effect on the /e core. The /e core seems to implement all the pipeline stages, but in a sequential, non-pipelined way.
That was a sample to make the point that NIOS is designed to be efficient for the /f and /s cores, not for the /e core. I wasn't complaining. I realize that is the best solution for most cases.
I just was hoping I could find something else designed from the ground for a smaller size. But seems there is no such a thing. Everybody targets high-performance cores such as Nios, or tiny 8-bit softcores such as PicoBlaze or Mico8. Nothing in the middle.