altera_onchip_flash

I think you saw success with the modification you made because the actual problem is a timing error. You must have gotten lucky on the new compile to have it not lock up the internal logic. The real issue is a timing bug with the busy signal. The fix I put in place for the 14.1 standard release code was to change line 446 from:

always @ (negedge reset_n or negedge is_busy or posedge flash_osc) begin

to

always @ (negedge reset_n or negedge is_busy or posedge clock) begin

The problem was that the flash_busy_reg signal needed to get latched in the clock domain, not the flash_osc domain. When I made this change it resolved all the timing errors and also worked flawlessly. After I reported this to Altera they informed me that there is a patch to install on 14.1 that also fixes this.