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Altera_Forum
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17 years ago

Altera IP megawizard plug-in manager....

Hi Anyone aware of these terms... 1. Descriptor RAM 2. True Dual Port SRAM based FIFO those are primities from Xilinx coregenerator, I need to generate the same using A...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
17 years ago

1) Not aware of an Altera block describing itself as descriptor memory

2) The megawizard will do this if you select "memory compiler" then FIFO; then on page 3 ensure you select "No, synchronize reading and writing to 'rdclk' and 'wrclk' respectively" and then tell it whether the clocks are related or not.

Alternatively, the old primitive dcfifo will do what you want.