Altera FFT simulation

Dear all,

I'm using the FFT IP, ver.9.0 (Stratix III, 128 points, 16 bit of data and twiddle precisions, single output, 1 engine, burst I/O, global clock enable).

I don't understand how to use the signal clk_ena or it doesn't work correctly. In detail, the following cases:

1. clk_ena = always 1: it correctly produce spectrums after about 800 hundred cycles;

2. clk_ena = always 0: it correctly doesn't produce spectrums;

3. clk_ena used to slow down the process (in my example clk=100mhz, clk_ena=50mhz): the behavior looks like case n.2.

Is this correct? How did you solve this problem? Thanks a lot!

ps: the behaviour is the same also with FFT ver 8.0.