Altera FFT IP-CORE core version 9

Allo,

I have a small problem with the FFT core!

i try to run the fft core in mode:

IFFT

burst

INPUT: 8192 samples @ 16bits (I do not use the imaginary part)

OUTPUT: 8196 samples @ 16 bits. (I do not use the imaginary part)

Twiddle : 8bits

Single Output

FFT engines : 2

My clock is 100Mhz, clk_ena is actif high and the reset_n (actif low) was activated at first.

Sink_ready signal is still high (active) and according to the doc, it should be active only for the length of a block (FIFO) and this length, I do not know !!!!!

The doc says:

In a burst I/O data flow architecture, the core can process a single input block only.

There is a small FIFO buffer at the sink of the block and sink_ready is not

deasserted until this FIFO buffer is full. Thus you can provide a small number of

additional input samples associated with the subsequent input block. It is not

mandatory to provide data to the FFT during sink_ready cycles. The burst

architecture can load the rest of the subsequent FFT frame only when the previous

transform has been fully unloaded.

What is the size of the FIFO in burst mode ?

Why Sink_ready does not fall down when the FIFO is full?

Why Source_valid is never valid even if source_ready is valid?

Thanks