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The maximum |magnitude| of your input(if you think of it as complex) is the amplitude of your sinusoid.
your output(y):
y is complex i.e. (y= complex(yreal, yimag)) and both elements together determine amplitude and phase(abs(y),angle(y)) in frequency domain.
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That's exactly what I mean and that's how I learned/understood it. Ok I understood everthing correct, the input signal seems to be correct (you also looked at it), and the simulation outputs the same results as real module. Than there must be some problem with the IP-core. I opened a service request. Maybe this will result in a solution of the problem.
So far I'm using my workaround with the additional shifting by 9.
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