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Altera_Forum
Honored Contributor
Honored Contributoraltera DMA stuck in busy state
Hi, I was trying to transfer data between DDR and FPGA through DMA(normal DMA from Qsys) in arria 10 devkit. The DMA goes into busy state after the transfer is initiated but doesn't come out ...
Altera_ForumHonored Contributor
Honored ContributorAs an additional observation to the earlier post,
I have also observed that when the when the length(in bytes) is given as the exact same number of bursts(in words), the length register decrements to 0 but the transactions continue to happen. Example: If I have given the burst as 256 words(32 bit) and length as 1024(bytes) and then issue a go, the length is decremented to 0 but the number of transactions that occurred is incrementing continuously. I could also see the data being written in the destination until the length goes to 0, and later overwritten by some junk values.
