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Hello
1. Can some one explain the differences between free Tools, Evaluation Tools, Licenced Tools ?
By free Tools, I mean tools one can get free of charges. Say download from web, develop a small applications, test it on the CPLD / FPGA an use the CPLD / FPGA.
2. I have a small application consisting of
- 3, 16 bit counters
- 5, 8 bit Latches
- Finite State Macine / State Control Machine of 30 - 50 Gates
- Glue Logic - arroun 20 Gates
A low end FPGA or High end CPLD should b adequate.
It it correct ?
3. Altera FPGA / CPLD chips are non volatile.
They retain the configuration after the power is rmoved from the board.
The configuration n not be loaded every time they are switch on.
Similar to ROM BIOS of a PC.
Is it corrct ??
4. Please recomend tools to be used. If possible free tools.
Thanks in advance.
GKM
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Hi,
only one remark to MSchmitt's reply. You can store your design data in a EPROM. The
FPGA still loses it programming when you switch the power off, but it will re-configurate
automatically at power-up.
Kind regards
GPK
Honored Contributor
