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dicas3d's avatar
dicas3d
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3 years ago
Solved

altera_avalon_new_sdram_controller

I have a project with Dev board max1000 and altera_avalon_new_sdram_controller and in the last version of quartus prime lite give an error that I can't found this module in Qsys. Today I'm writing to ...
Cxl
Memory
  • dicas3d's avatar
    dicas3d
    3 years ago

    I picked an Verilog Model from manufacturer. This is the only thing that is provided as IP Core from him. This is a file .vp and .v for 

    NC-Verilog

    And I don't know how use as an Qsys component. The main file is the .vp.

dicas3d's avatar
dicas3d
Icon for New Contributor rankNew Contributor
3 years ago

I picked an Verilog Model from manufacturer. This is the only thing that is provided as IP Core from him. This is a file .vp and .v for 

NC-Verilog

And I don't know how use as an Qsys component. The main file is the .vp.