Forum Discussion
Altera_Forum
Honored Contributor
15 years agoThanks for the comments.
I was looking at DDR since the signal needed to travel more than 2m and was looking at reducing the source-synchronous clock frequency for power reasons (since operating off battery and it had to go to transmit to approx another 100 boards with 100 receivers in a multidrop LVDS senario). Also lower clock would give lower EMC. But I have decided to drop DDR for now (stick with SDR) as simplier. Ian