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One more thing about thing about the PCIe,
We have bars present in the PCIe...corresponding to the memory size that depends on the configuration we choose....
I know that this memory resides in the system....
I want to know where exactly this memory is located???
for example if bar0 and bar1 are 1Mb & 2Gb SIZE where exactly they are located...
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There is no 'memory' associated with a BAR. Its more like an address decode region in the memory map of your host PC. When the host PC performs a read or write access, the transactions get targeted at the PCIe board.
Its up to your design to actually return something at those addresses. As a simple test, you could have all reads and writes return a fixed pattern, eg. 0xDEADBEEF, and see if you can read those values. Then you can get fancier and have writes write to the LEDs on the board. The PCIe reference designs include DDR memory interfaces.
Cheers,
Dave