Create a Modelsim simulation with the transceiver and test the different control signals in that.
Then in hardware use SignalTap II to compare the simulation to the hardware. SignalTap will not be able to probe the high-speed SERDES lanes and internal GXB signals, but you will be able to see how the received parallel output pattern is bit-shifted relative to the transmit pattern.
Start with some simple patterns, eg. 5555h will be received as either 5555h or AAAAh, and if you assert the bit-slip control, you can change (bit-slip) the pattern.
There are some transceiver debug application notes and online webinars. Look on the Altera web site.
Cheers,
Dave