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Altera_Forum
Honored Contributor
17 years agoALT_PLLRECONFIG block busy signal problem
I have implemented ALTPLL_RECONFIG megafunction using an454. I have used 6 mifs, 1 mux, 1 reconfiguration block, 1 reconfigurable pll and a simple state machine. The problem is whenever I run t...
Altera_Forum
Honored Contributor
17 years ago --- Quote Start --- 25 MHZ. Does it have a upper or lower limit? --- Quote End --- max 100MHz. does your read_param, write_param, reconfig, and write_from_rom being asserted? "Busy" will get asserted if anyone of these pins are toggle high. din