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wangduoyu's avatar
wangduoyu
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1 month ago

Agilex 5: Connecting multiple AXI Masters to DDR without explicit Interconnect IP

Hi all, I'm developing on the Agilex 5 platform and need two AXI4 masters to access the DDR. I noticed there isn't a standalone IP similar to Xilinx's axi_interconnect. Is it correct to simply conn...
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wangduoyu's avatar
wangduoyu
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1 month ago

Thanks. Is it necessary to use an AXI Bridge to solve the addressing issue?

AdzimZM_Altera's avatar
AdzimZM_Altera
Icon for Regular Contributor rankRegular Contributor
1 month ago

Hello wangduoyu,

 

For the address out of range issue, you can try to modify the module or add Address Span Extender IP to resolve the issue.

I think AXI Bridge may be used for utilize the resource of the manager and subordinate interface.

 

Regards,

Adzim