Forum Discussion
Altera_Forum
Honored Contributor
14 years agoThank you bmarshall for your informative reply. It is helpful to know that you ran into the very same issues that I have faced. I had to spend a LOT of time on the FPGA-to-PHY interface, which is especially disturbing as it is such a simple interface. As it turned out, I ended up with a very straight-forward solution. The lack of comprehensive documentation made this process far more difficult than it needed to be.
I now have the iniche TCP/IP stack running on a custom board with 512K of SRAM instead of the cumbersome SDRAM. From what you wrote along with the comments and questions of so many others, I can see that I still have a daunting task ahead to bring this design to the product level. I just hope I can get there before the project is abandoned. I am always happy to share my findings with others and would really appreciate hearing from someone who has brought a similar product to market with the Nios II and Qsys. Thanks again for your comments.