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Altera_Forum's avatar
Altera_Forum
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15 years ago

About RapidIO on ArriaII devkit

I have two ArriaII devkits, and the kits communicate with each other by rapidio(1.25Gbps). But I found the rapidio core on both kits are not initialized. The PORT_UNIT register's bit was always asser...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

The kits use different project base on SOPC. One is operated by niosii, the other is operated by pcie bridge.

I found that the PORT_UNIT register's bit would be deasserted when the two kit use the same project.