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Altera_Forum
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16 years ago

About PCI IP core pci_mt32

I'm evaluating the performance of pci_mt32 core now. FPGA act on a master engine, and the PC act as a target. FPGA launch a DMA operation to transfer data into PC. One problem I am puzzled w...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thanks for your help.

Could you elaborate on how to handle the retry command in the master part?When the master detect a Disconnect with data or Disconnect without data in the lm_tsr register, a new transaction will be launched. But the data can not be written into continuous page memory in the computer. It can be written into a new page. I wonder, is there some particular action should be done in the retry data? How to launch the retry command?

Thanks