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Altera_Forum
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16 years ago

3G-SDI IO standard and pin locking

Hi, I am trying to do pinlocking for 3G-SDI(tripple rate), what are the standards should i set for refrence clock and differential serial data? when i try to pin lock the differential refrence ...
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Altera_Forum
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16 years ago

Thanks Jake,

I will try the sugessions you mentioned.

but why is it so that fitter creates differential pair automatically? below is the warnings message.

Warning: Following 10 pins are differential I/O pins but do not have their complement pins. Hence, the Fitter automatically created the complement pins.

Warning: Pin "Lvds1RefClk" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "Lvds1RefClk(n)"

Warning: Pin "Lvds2RefClk" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "Lvds2RefClk(n)"

Warning: Pin "Lvds1Tx" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "Lvds1Tx(n)"

Warning: Pin "Lvds1Rx" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "Lvds1Rx(n)"

Warning: Pin "Lvds2Tx" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "Lvds2Tx(n)"

Warning: Pin "Lvds2Rx" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "Lvds2Rx(n)"

Warning: Pin "Sdi2HDRefClk" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "Sdi2HDRefClk(n)"

Warning: Pin "Sdi1Rx" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "Sdi1Rx(n)"

Warning: Pin "Sdi1Tx" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "Sdi1Tx(n)"

Warning: Pin "Sdi1HDRefClk" is a differential I/O pin but does not have its complement pin. Hence, fitter automatically created the complement pin "Sdi1HDRefClk(n)"

in my previous design i have assigned differential signals but i was not getting these warning messages the only difference between previous design and new design is i was using cyclone III for previous design and Arria II for new design.

One more thing as the tool creates signalname(n) complementry signals how do i define it in entity as () are not allowed in port name.

Thanks,

Bhupesh