Honored ContributorHi.
Altera 10GBit EMAC ip-core has port link_fault_status_xgmii_rx_data[1:0]. Can I read link fault status from MAC registers? How Nios II programm can determine this condition without using link_fault_status_xgmii_rx_data[1:0] port. (My system consists of 10GBit EMAC + XAUI + XAUI2SFPP Transceiver). Regards Andrei
Honored ContributorThere is no register for Link Fault Signaling status. Instead, you can use a Qsys component called PIO (Parallel I/O). The component bridges between the link_fault_status_xgmii_rx_data[1:0] signals and the Avalon-MM interface.
Honored ContributorFrom the 10G MAC user guide, I don't see such register is available.
Honored ContributorThanks for your reply.
I understand that can use PIO. But I think may be I can take link fault status from XAUI-IP or from XAUI to SFPP Transceiver (TLK10232)? I have problem with finding necessary register. May be PIO is the only way? PS: Which BRIDGE-component do you mean? I can't find it in IP catalog. Or you mean for this purpose I need create my own user IP?Honored ContributorI don't think XAUI-IP or SFFP Transceiver give you link fault status. PIO can be found in Qsys, not IP Catalog. You can use PIO in your Qsys system Nios II exist.
