Honored Contributor
Honored ContributorI figured it out:
http://www.alterawiki.com/wiki/new_qsys_issues Merlin Address Routers for Custom peripherals Issue: When generating the system, Merlin address routers are generated ignoring the ExplicitAddressSpan Avalon property. This causes channels to be greater than the complete address space in some cases; for instance, for a system that uses 29 bits of address space (512 MBs), with explicitly using only 16 MBs, Merlin address routers are generated with full 29 bits of address space per channel. Since the complete address space defaults to the size of the address space of the biggest addressable peripheral, this later causes errors in compilation (Verilog errors containing "...part-select direction is opposite from prefix index direction...") and also address space is overlapped with other peripherals with smaller address spaces. Workaround: Manually edit nios_addr_router.sv files (there will be more of them; they are located under \{nios_name}\synthesis\submodules\ directory in your project directory) and manually set the values of the PADx variables to the desired address space size (ExplicitAddressSpanValue = 2^PADxValue). Do not change the value of the complete address space (RG variable), as this might introduce more problems.
