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YY
New Contributor
New ContributorWorst-Case Completion Time for PLL Dynamic Phase Shift (PHASESTEP → PHASEDONE)
Hello, Please tell me the maximum time between the execution of Phasestep and the completion of Phasedone. The relevant link is below. Cyclone® IV Device Handbook - Chapter 5: Clock Networks and P...
FvM
Super Contributor
Super ContributorHi,
Dynamic Phase Shifting paragraph in Cyclone IV device handbook explains that step timing is set by a combination of Scanclk and VCO frequency. Respectively there's no simple phase step duration specification.
In a specific implementation, we are seeing about 10 scanclk cycles required for a phase step.
Regards
Frank
AqidAyman_Altera
Regular Contributor
Regular ContributorHello YY,
Yes, I agree with Frank. I also did not found a direct duration time between the phasestep and phasedone as you requested. However, the relationship between the Scanclk and VCO frequency may affect the phasedone duration time.
Below is the article that may help you:
Why does phasedone always appear high after asserting phasestep? | Altera Community - 341015
Regards,
Aqid
