Why would always @ (posedge) execute when no clock edge occurs?

I'll answer my own question:

The 'extra' hits in the always loop were from glitches in the clock, creating extra posedges. I wasn't seeing the edges on the outputs because they were to fast to show up on the logic analyzer. (Faster than the sampling rate.)

The solution was to debounce the generated clock signal to get rid of the glitches.