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Altera_Forum's avatar
Altera_Forum
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14 years ago

Why is FPGA consume power without core voltage

Hi,

I am just trying to find the power consume by the FPGA. Found when I only apply 3.3V to VCC IO without applying the core voltage VCCint, the FPGA actually consume more power than if I applied the core voltage VCCint. Why is it so?

Is this power drawn consider static power?

What is the FPGA status in when core voltage is not applied but only 3.3V is applied to VCCIO.

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    14 years ago

    --- Quote Start ---

    What is the FPGA status in when core voltage is not applied but only 3.3V is applied to VCCIO.

    --- Quote End ---

    Standard FPGAs aren't designed for this mode of operation, it's beyond specification. In so far you can't expect answer from the documentation. There may be e.g. a problem with the level translation circuits in this sutuation.