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Altera_Forum's avatar
Altera_Forum
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16 years ago

why has the configuring process failed?

Hi,

Everybody.

In my new FPGA system(my first system), I use EP2C5Q208 and EPCS4.

In quartus 9.1 web . I program the EPCS4 successfully, and the verify processing complete successfully.

BUT, after I repower my system, I find the voltage of conf_done pin is always low. voltage of nCSO is pull down to low level frequently. You know, it means the configuring procedure is repeated all the time.

I check the schematic in protel, and find nothing incorrect. I designed the schematic according to the configure handbook strickly.

what cause the failure?

thanks in advance.

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    What are your MSEL pins set to? Are all of your voltages correct? What about the DCLK and DATA0 signals, are they toggling?

    Jake
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    You might want to check out thread "EPCS booting problem" ( http://www.alteraforum.com/forum/showthread.php?t=19496 ), where several people have found out that the EPCS programming files produced by 9.1 are (almost) useless. There are some workarounds discussed, which have worked in some cases.

    So perhaps you should try Quartus 9.0 Web version and see if you board works with the files produced with that version ...

    Regards, Jari
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    --- Quote Start ---

    What are your MSEL pins set to? Are all of your voltages correct? What about the DCLK and DATA0 signals, are they toggling?

    Jake

    --- Quote End ---

    thanks， Jake。

    In my system, the MSEL pins are connected to GND.

    the power supply is ok.

    the DCLK is stable with a frequence of 12MHz.

    the DATA0 is always alter between '0' and '1'.
  • Altera_Forum's avatar
    Altera_Forum
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    16 years ago

    Did you try Jaris's solution? Are you using compressed programming files. If so, try using an uncompressed file and see if that works.

    Jake