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Altera_Forum
Honored Contributor
16 years agowhy has the configuring process failed?
Hi, Everybody. In my new FPGA system(my first system), I use EP2C5Q208 and EPCS4. In quartus 9.1 web . I program the EPCS4 successfully, and the verify processing complete successfull...
Altera_Forum
Honored Contributor
16 years ago --- Quote Start --- What are your MSEL pins set to? Are all of your voltages correct? What about the DCLK and DATA0 signals, are they toggling? Jake --- Quote End --- thanks, Jake。 In my system, the MSEL pins are connected to GND. the power supply is ok. the DCLK is stable with a frequence of 12MHz. the DATA0 is always alter between '0' and '1'.