Forum Discussion
Altera_Forum
Honored Contributor
13 years agoHi there,
regarding the waveform - I assume we are talking about the clk-Signal generated by the external 50MHz clock? That raises the question what kind of scope and probe you are using as these high frequencies cannot be shown on low-end scopes (according to Nyquist, you need at least two points per period for frequency information and 10 points for some estimation of signal's waveform. Thus 50MHz clock would require 500MHz scope (and matching probes / interconnection). Regarding the delay: The term "after x ns" cannnot be systhesized into the Hardware - it's a construct to be used for testbenches and/or simulation but not for real hardware. To implement delay you normally use a counter driven by "clk" with the delay being a multiple of "clk" periods. Using your's 50MHz, the smallest delay would be 1 clockcycle, i.e. 20ns... (Quartus should have raised a warning on the "after..."... Regards