Forum Discussion
Altera_Forum
Honored Contributor
16 years agoActually, I don't know, how the MSEL hardware is exactly operating nor if it's identical for Cyclone II and Cyclone 3. I guess, you have to do some tests to know for sure.
The Cyclone II handbook may be understand like MSEL is read in with a reconfiguration request (nConfig assertion most likely). It also repeats the usual warnings. --- Quote Start --- During power-on reset (POR) and reconfiguration, the MSEL pins have to be at LVTTL VIL or VIH levels to be considered a logic low or logic high, respectively. ... The MSEL[] pins should not be driven by a microprocessor or another device. --- Quote End --- It should be expected, that the warnings aren't given without a purpose. Together with the remark, that MSEL must not float, although it should be ignored for JTAG configuration mode, it sounds like a problem that can arise when MSEL is undefined at certain times, e.g. during POR. If I remember right, it has been said somewhere, that the configuration logic can be locked in this case. I assume, that you can drive MSEL from user logic, if you take care that it doesn't expose an undefined level during power on, which can be achieved by specific hardware, e.g. strong pull-up/pull-down resistors. Then you can evaluate, if an MSEL configuration change takes effect in a reconfiguration attempt. Possibly, it does. Good luck, Frank