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- Altera_Forum
Honored Contributor
I think you can find the answer in "Transceiver Architecture in Stratix IV Devices"
http://www.altera.com/literature/hb/stratix-iv/stx4_siv52001.pdf?gsa_pos=2&wt.oss_r=1&wt.oss=transceiver%20architecture From my understanding, Stratix IV devices have two CMU channels—CMU0 and CMU1—within each transceiver block that you can configure as a transceiver channel or as a clock generation block. And when you configure CMU channel as a transceiver channel you have GXB_CMUTX/RX.