Forum Discussion
YuanLi_S_Intel
Regular Contributor
6 years agoHi Noah,
IO pins will not stay in tri-state after power-up. It will follows what you have programmed and set in Quartus.
DEV_CLRn are low by default after power-up. Meanwhile for DEV_OE, it has to be asserted so that the other IO pin will not remain in tri-state mode.
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max2/max2_mii5v1.pdf (Page 51)
Regards,
YL