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Twincreeks's avatar
Twincreeks
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4 years ago
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What is the highest data rate with Cyclone 10 GX pins in diff SSTL 1.2 V?

I hope to use a Cyclone 10 GX device to transmit data. The datasheet specifies the highest data rate to be 1.434 Gbps. It is not an issue for LVDS standard with the LVDS SERDES IP, but I need to use diff SSTL-12 because the common-mode voltage of LVDS is incompatible with my receiver. Can I transmit data at 1.434 in diff SSTL-12? If yes, how should I do? Is there other SERDES IP that supports SSTL? If not, what is the highest data rate that diff SSTL-12 can achieve? Thanks.

  • EngWei_O_Intel's avatar
    EngWei_O_Intel
    4 years ago

    Hi Twincreeks

    This is the understanding we got from the backend team. Since there are various factors that might affect the maximum performance of different IO standard of GPIO, we do not guarentee the max performance number, which is also the reason it is not listed in the specification documentation.

    Thanks.

    Eng Wei

4 Replies

  • EngWei_O_Intel's avatar
    EngWei_O_Intel
    Icon for Frequent Contributor rankFrequent Contributor
    4 years ago

    Hi there

    The maximum data rate for general purpose I/O standards is not published as it is depends on design and system specific factors. You must perform timing closure analysis to determine the maximum achievable frequency for general purpose I/O standards. Ensure proper timing closure in your design and perform HSPICE/IBIS simulations based on your specific design and system setup to determine the maximum achievable frequency in your system.

    There is only LVDS SERDES IP available in Quartus. Thanks.

    Eng Wei